In the field of digital radio, choosing the point at which to convert from analog circuitry to digital processing may play a significant roll in system function and performance. Radio frequency signals carry baseband information that must be retrieved by the radio. The process of retrieving this information is performed by a radio and, ideally, by all-digital software defined radio (SDR). As is conventionally understood, SDR defines a collection of software technologies where some or all of the radio's operating functions (also referred to as physical layer processing) are implemented through modifiable software or firmware operating on programmable processing technologies. However the SDR is limited by the ability to digitally process the RF signals, as it is difficult to construct a circuit to convert RF signals from the antenna directly into data.
The analog to digital converter (A/D or ADC) is an electronic device that can convert a signal amplitude to a numerical value. These devices enable a central processing unit to carry out processing functions in the more precise mathematical domain directly from the antenna, instead of physical circuits utilizing discrete analog devices. In radio signal processing, recovery of baseband signal requires more than simply processing amplitude information. The frequency and phase of the RF signal must also be measured. The amplitude and phase, also referred to in the art as I&Q information, are critical to demodulation. The A/D converter must therefore provide the I&Q of the RF signal in the data it generates so the baseband can be recovered. Before that can happen however, the signal must be tuned at the antenna.
Present A/D conversion systems are too slow to directly digitize ultra high frequency and microwave RF signals. These systems must utilize several analog down conversion steps before the signal is sufficiently low in frequency to allow for digitization. In addition to limited or low sample rates, A/D converters further hinder signal processing operations due to their limited resolution, measured by the effective number of bits or ENOB.
Signal processing systems utilizing A/D converters, including complex A/D converters (CADCs), have various functionality requirements which may include a track and hold (T&H) of an analog input signal, and precision timing operations, in addition to the A/D conversion process. Clock generators, for example, are used to synchronize a T&H amplifier with an A/D converter. More specifically, the T&H amplifier follows an input analog signal of interest until a control signal from the clock causes the amplifier to freeze and hold the signal at an instant (for a short period of time). The same clock signal also strobes the A/D converter to convert the frozen sample to a digital value. This digital data can then be buffered and read out to memory for further processing. The time it takes for the T&H amplifier and A/D converter to perform the operation and be ready for the next value is the A/D sample rate. Over a given sample period, however, the radio frequency signal may change significantly. These changes may be lost due to the insufficient speed in the conversion process. For radio frequencies in the ultra high frequency (UHF) band, achievable Nyquist in band (first zone) direct A/D sampling is not possible for high performance signal processing operations, thus requiring one or more frequency down-conversion steps prior to digitizing the signal.
Time-staggered A/D converters may be designed at the circuit board level. They can be used to increase the sampling rate of an incoming radio frequency signal so that direct conversion at the RF level from the antenna is possible. However, time-staggered A/D converter arrays are performance limited by timing noise, particularly the stagger jitter which is transformed into phase and frequency error. Another noise source is that introduced by the multiplicity of A/D converters which do not perform identically for a given reference signal. Moreover, noise which results from pathway circuitry imperfections will affect the data samples as frequency or phase distortion. Thus, the three main sources of noise: stagger clock jitter, differences between A/D units, and imperfections in multiple signal pathways on the circuit board, may cause degradation in signal processing operations and overall radio communication performance.
Improved CADCs are desired which can increase the sampling rate for UHF signal processing and improve signal to noise ratios and overall signal processing performance.